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负责大规模深度亚微米GPU芯片的物理实现,包括模块级及全芯片布局规划、时序收敛、布局布线和物理验证。参与7nm流片,并协同全球前后端团队。
Responsibilities:
Work with global Front-End design team and physical design team for large scale Asic chip physical implementation. Focus on physical design of deep sub-micron GPU chips including block level / full chip floor planning, timing closure, place route, physical verification etc.
Qualifications:
1. B.S with 5+ years experience or MS with 3+ years experience in physical design;
2. Knowledgeable in all aspects of ASIC design flow;
3. Hands on experience in physical design;
4. Tape out experience in 7nm is a plus;
5. Familiar with Unix/Linux environment;
6. Familiar with Back-End (physical design) EDA tools;
7. Familiar with Front-End EDA tools;
8. Good at scripts;
9. Good listening, writing and speaking English;
10. Good communication skills;
11. Dedicated, hard working and good team player.
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