以上为北京时间。链接检查不代表仍在招聘，申请前请以招聘官网为准。
按这个岗位的城市和方向提醒，确认后才开启，可选择每日或每周。
负责内存控制器ASIC设计，包括微架构开发、RTL编码及低功耗/DFT技术应用。需熟悉DDR/LPDDR等DRAM标准与DFI协议，并具备硅调试经验。
Responsibilities
1. Develop micro-architecture, write micro-architecture spec and other documents.
2. Write RTL code, meet the function target and have good performance/power/area efficiency.
3. Apply low power, DFT, DFD and other digital design techniques.
4. Work with DV team to improve test plan and debug failed tests.
5. Clean Lint, timing and other issues.
6. Participate in silicon debugging.
Qualifications
1. Master in electrics or computer engineering.
2. At least 5 years working experience in ASIC logic design.
3. Familiar with DRAM structure and standards (DDR/LPDDR/GDDR/HBM), DFI interface protocol.
4. Experience with memory controller/ DRAM controller design.
5. Experience with memory controller performance debug and post silicon memory controller bring up.
6. Familiar with front-end EDA tools and flows.
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