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选择求职条件负责开发并优化半导体缺陷检测与计量技术,支持高产能制造和下一代节点。通过工艺实验和统计分析提升良率,推动自动化与硬件改进。与跨职能团队合作,推进新技术落地。
About the Role
Join our Advanced Packaging Technology and Manufacturing team as a Module Development Engineer, Defect Inspection, where you will help enable next-generation semiconductor innovation. In this role, you will develop, optimize, and scale defect inspection solutions that support both current high-volume manufacturing (HVM) and future technology nodes.
You will collaborate across engineering, suppliers, and research teams to improve inspection capability, drive yield improvements, and influence future process technologies.
What You’ll Do
Key responsibilities will include but not limited to:
Behavioral traits that we are looking for candidates who:
Why Join Us
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Note:
For information on Intel’s immigration sponsorship guidelines, please see
Intel U.S. Immigration Sponsorship Information
Minimum Qualifications and Experience:
Bachelor’s degree in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering, Physics, Chemistry, or related field + 4 years of experience. Or a Master's degree in the same field with 3+ years of experience and a PhD in the same field with 2+ years of experience.
Your experience described above must be in the following:
Preferred Qualifications and Experience:
We invite you to bring your expertise and creativity to Intel, where you will have the opportunity to innovate, collaborate, and shape the future of semiconductor technology. Apply now and become an integral part of our dynamic team.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.负责领导尖端SoC设计的验证工作,制定仿真、仿真加速及形式化验证策略,确保流片一次成功。指导验证团队,定义可扩展方法论,影响Intel技术方向,弥合微架构规范与硅片实现之间的差距。