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负责高速SerDes模拟电路设计与验证,包括均衡器、驱动器及采样器。执行EMI、老化等可靠性检查,确保设计稳健。与系统及数字团队协作,优化架构并实现高效集成。
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Build the future nobody's dreamed of yet... are you ready to rethink the impossible?
As a Staff Analog Mixed-Signal Design Engineer in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.
Are you in?
Your Role
Key responsibilities in your new role:
- Design and verify analog circuits for high-speed SerDes sub-blocks, including de-/serializers, current and voltage-mode drivers, Continuous-Time Linear Equalizers (CTLE), and Slicers
- Perform analog sign-off activities, including EMI, aging, and other reliability checks
- Collaborate with System Architecture teams to define and refine specifications for analog sub-blocks
- Evaluate and select optimal architectural solutions to meet the design specifications
- Partner with Digital Design teams to ensure effective control and integration of analog blocks
- Work closely with Analog Physical Design teams to achieve robust layout implementation for high-frequency critical blocks
- Engage with Verification teams to ensure high-quality, reliable, and silicon-ready designs
Your Profile
Qualifications and skills to help you succeed:
- A Master's degree in Electrical/Electronic Engineering or a related field of study
- 5+ years of experience in analog design for high-speed SerDes Ips
- Knowledge of SerDes sub-block design, including de-/serializers, current and voltage-mode drivers, Continuous-Time Linear Equalizers (CTLE), slicers, and related circuits
- Experience with Analog Design Tools (e.g., Virtuoso, Spectre, and others)
- Experience with FinFET technologies is a strong advantage
- Strong collaborative mindset with the ability to work effectively in cross-functional teams as well as eagerness to learn and continuously develop technical expertise in advanced analog design
- Fluency in English (mandatory)
Please send us your CV in English.
Pay Information - Indicative Salary Range:
Pavia, Italy: 43440€ -59730€
The stated salary comprises annual base pay and target variable compensation. The starting salary is determined using objective, gender neutral criteria, including relevant experience, qualifications, and role scope; prior compensation is not requested or considered.