以上为北京时间。链接检查不代表仍在招聘，申请前请以招聘官网为准。
按这个岗位的城市和方向提醒，确认后才开启，可选择每日或每周。
负责IC封装SIPI方案开发与优化，与跨职能团队协作进行高速IO互连仿真、功耗分析及测试方案制定，关联测量与仿真结果。要求硕士及以上，5年以上SOC项目SIPI经验，熟悉PCIe、LPDDR、高速Serdes等接口。
岗位职责：
In this position, you will be working with a cross-functional team and will be developing package SIPI solutions. Your scope of responsibilities will include, but are not limited to:
• Engaging with silicon designers, package designers to identify&Remove the SIPI risk of IC packaging
• Overseeing all aspect of package SIPI optimization from device concept to production
• Performing simulation of highspeed IO interconnect channels and workload power analysis.
• Creating signal measurement/power test plans and reviewing measurement results
• Correlating measurements to SIPI simulations
• Defining and continuously improve methods/flows for SIPI model generation, leveraging industry best practices and pos-sillicon learning
任职要求：
You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
• Candidate must possess a Master's, or PhD degree in Electrical Engineering, Electronics Engineering, computer science or related field
• 5+ years of experience with complex SOC projects and SIPI correlation
• Signal Integrity experience supporting high-speed signals and memory interfaces such as PCIe, LPDDR, High speed Serdes.
• Fundamental knowledge of transmission line theory and high-speed Printed Circuit Boards (PCB) design.
• Experience with EDA Tools & simulation tools.
Preferred Qualifications:
• Substrate layout process and methodology.
• Lab equipment such as TDR VNA digital oscilloscopes and logic analyzers.
【职位类别】芯片序列
【学历要求】硕士研究生及以上
【经验要求】5年
【招聘项目】日常招聘
【所属公司】北京地平线信息技术有限公司
You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
• Candidate must possess a Master's, or PhD degree in Electrical Engineering, Electronics Engineering, computer science or related field
• 5+ years of experience with complex SOC projects and SIPI correlation
• Signal Integrity experience supporting high-speed signals and memory interfaces such as PCIe, LPDDR, High speed Serdes.
• Fundamental knowledge of transmission line theory and high-speed Printed Circuit Boards (PCB) design.
• Experience with EDA Tools & simulation tools.
Preferred Qualifications:
• Substrate layout process and methodology.
• Lab equipment such as TDR VNA digital oscilloscopes and logic analyzers.
软件和信息技术服务业
